1. Field of the Invention
The present invention relates generally to integrated circuit design and testing, and more specifically to pin-based access for full-scan production testing of an integrated circuit device.
2. Description of the Related Art
In the testing of integrated circuits and circuit devices, an access mechanism is desired to configure the device for full-scan production test. Typically, a pin-based access is generally utilized for testing, but as circuitry becomes more complex, functional modes require use and control of most available existing device pins. What is desired is a pin-based access without increasing the pin count which would fundamentally alter the cell type.
In one prior art approach, scan test access is available by shifting in pre-defined instructions. However, the shifting in of instructions is generally undesirable as a method of configuring the device for production test since it involves the use of sequential elements before they have been screened for manufacturing defects. Further, application of such instructions can be cumbersome and can complicate efforts to debug the setup in the event that the initialization sequence malfunctions.
In order to maintain the cell architecture and configuration while programming the device for manufacturing test, only unregistered pin inputs are potential candidates for the desired access. This restriction essentially eliminates all functional input/output (I/O) pins since these are associated with boundary scan cells implemented as part of the internal scan chain. Further, any modification to an I/O pin or entire cell would create a new cell type, which is to be avoided. Moreover, such a modification would add unnecessary loading to the functional path, with a corresponding degradation in performance.
In light of the foregoing, a method of access and circuit design is desired to enable full-scan production testing of increasing complex circuitry without increasing pin count or effecting application pathways or artwork.